The present invention generally relates to a method for forming lining oxide in an opening for a shallow trench isolation (STI) and more particularly, relates to a method for forming lining oxide in an opening for a shallow trench isolation incorporating a pre-annealing step for repairing structural damages incurred in the silicon substrate by a dry etching process for forming the opening.
In recently developed semiconductor fabrication technology, shallow trench isolations have been used in high density memory and other semiconductor devices since the isolation provides simplified back-end operations such as packaging. This is in contrast to a bird""s beak type LOCOS isolation which provides an uneven top surface (or topography) on a memory device and leads to poor photolithographic results due to focusing difficulties. Shallow trench isolation can be etched in the silicon between neighboring devices. It allows a device to be built closer together.
When a shallow trench isolation is used in a semiconductor device, a more planar surface on the device can be obtained due to the absence of formation of bird""s beak. Based on the advantages of a tighter line definition and a greater planarity that are achieved by the shallow trench isolation, the isolation is very suitable for applications in sub-half-micron semiconductor processes.
Isolation of individual semiconductor devices without using the bird""s beak can be carried out by etching shallow vertical trenches in the silicon between neighboring devices. In shallow trench isolation, trenches of about 0.3 to 0.8 micron deep are anisotropically etched into a silicon substrate by a dry etching technique. The active regions in a substrate are protected from the etch during the trench etching step. After the trenches are formed, a chemical vapor deposition oxide is deposited on the wafer surface and then planarized so that only oxide remains in the trenches with its top surface at the same level as the original silicon surface. The processing technique has the advantages of not requiring any bird""s beak and that no encroachment is involved. When two devices on a substrate are separated by a trench, the electrical field lines have to travel a longer distance and change directions twice, so that the field lines are considerably weakened. Shallow trenches of submicron dimensions are therefore adequate for isolation to prevent the punch-through and latch-up phenomena.
In a conventional shallow trench isolation forming process, for which a process flow chart 10 is shown in FIG. 1, a dry etching is carried out by utilizing high energy ion bombardment, for instance, in a reactive ion etching process. The high energy ion bombardment, while removing the unwanted silicon layer and thus forming the opening, also damages the remaining single crystal silicon material that surrounds the trench opening. For instance, the ion bombardment causes defects in single crystals such as dislocations that result in leakage current in the device fabricated and consequently, low yield of the fabrication process.
Two alternate conventional forming processes for a shallow trench isolation are shown in FIG. 1. In the first process, a silicon wafer is provided in step 12, followed by the formation of a pad oxide layer in step 14. A silicon nitride mask layer is then formed on top of the pad oxide layer in step 16, followed by a dry etching process shown in step 18 to form the trench opening. After the formation of the trench opening, a thin layer of silicon oxide is formed in the opening, as shown in step 20, in order to cover the corners of the opening and to facilitate the final deposition step 22 for the oxide isolation by a high density plasma chemical vapor deposition (HDP CVD) technique. In this first conventional method, no attempt is made to repair the damaged structure caused by ion bombardment in the dry etching step 18.
In an alternate method, also shown in FIG. 1, after step 20 during which a lining oxide layer is formed, a post-annealing process for the lining oxide layer in a nitrogen atmosphere is conducted in step 24. The trench opening is then filled with oxide by a HDP CVD process in step 26. The post-annealing process, i.e. step 24, is conducted at a temperature of about 1,100xc2x0 C. in an attempt to repair the damaged crystal structure of the silicon substrate. Since the post-annealing process is conducted after the deposition of the lining oxide layer, the repair of the silicon structure under the lining oxide layer cannot be effectively carried out. Moreover, the post-annealing process requires a separate process recipe which further complicates the fabrication process.
It is therefore an object of the present invention to provide a method for forming lining oxide in an opening for a shallow trench isolation that does not have the drawbacks or shortcomings of the conventional forming methods.
It is another object of the present invention to provide a method for forming lining oxide in an opening for a shallow trench isolation that is capable of effectively repairing silicon structures damaged by a reactive ion etching process for forming the opening.
It is a further object of the present invention to provide a method for forming lining oxide in an opening for a shallow trench isolation by annealing the silicon structure after a dry etching process has been conducted for forming the opening prior to a lining oxide deposition process.
It is still another object of the present invention to provide a method for forming lining oxide in an opening for a shallow trench isolation by annealing a silicon substrate at 1,100xc2x0 C. in an environment that contains oxygen for preventing the formation of silicon nitride.
It is yet another object of the present invention to provide a method for forming lining oxide in an opening for a shallow trench isolation by annealing the silicon substrate at a temperature of at least 1,000xc2x0 C. in an environment that contains not more than 10 vol. % oxygen.
It is another further object of the present invention to provide a method for forming lining oxide in an opening for a shallow trench isolation by annealing a silicon substrate after a dry etching process prior to depositing the lining oxide layer in the trench opening.
It is still another further object of the present invention to provide a method for forming a shallow trench isolation incorporating a lining oxide layer by first dry etching a trench opening in the silicon substrate and then annealing the substrate to repair damages to the silicon structure prior to the deposition of the lining oxide layer.
It is yet another further object of the present invention to provide a method for forming a shallow trench isolation incorporating a lining oxide layer by first dry etching a trench opening and then annealing the silicon substrate at a temperature of at least 1,000xc2x0 C. in an environment that contains less than 10 vol. % oxygen.
In accordance with the present invention, a method for forming lining oxide in an opening for a shallow trench isolation in a semiconductor structure and a method for forming a shallow trench isolation incorporating a lining oxide layer are provided.
In a preferred embodiment, a method for forming lining oxide in an opening for a shallow trench isolation in a semiconductor structure can be carried out by the operating steps of first providing a silicon substrate; forming a pad oxide layer on the silicon substrate; depositing a silicon nitride mask on the pad oxide layer; patterning and forming a trench opening in the silicon substrate for the shallow trench isolation; annealing the structure at a temperature of at least 1,000xc2x0 C. in a furnace; and forming a lining oxide layer in the trench opening of the silicon substrate.
The method for forming lining oxide in an opening for a shallow trench isolation in a semiconductor structure may further include the step of annealing the structure in an environment that includes oxygen, or the step of annealing the structure in an environment that includes oxygen and nitrogen. The method may further include the step of annealing the structure in an environment that includes not more than 10 vol. % oxygen with the balance being an inert gas, or the step of annealing the structure in an environment that includes not more than 10 vol. % oxygen at a temperature of at least 1,100xc2x0 C. The method may further include the step of filling the trench opening with silicon oxide after the lining oxide forming step. The method may further include the step of filling the trench opening with high density plasma chemical vapor deposition deposited silicon oxide on top of the lining oxide layer.
The method may further include the steps of filling the trench opening with HDP CVD oxide and planarizing the HDP CVD oxide forming a shallow trench isolation. The method may further include the step of planarizing the HDP CVD oxide by chemical mechanical polishing. The method may further include the step of forming the pad oxide layer to a thickness between about 100 xc3x85 and about 400 xc3x85, or to a thickness preferably between about 200 xc3x85 and about 300 xc3x85. The method may further include the step of forming the lining oxide layer to a thickness between about 100 xc3x85 and about 300 xc3x85, or to a thickness preferably between about 150 xc3x85 and about 250 xc3x85.
The present invention is further directed to a method for forming a shallow trench isolation incorporating a lining oxide layer which can be carried out by the operating steps of first providing a silicon substrate; forming a pad oxide layer on the substrate; forming a silicon nitride mask on the pad oxide layer; patterning a trench opening in the silicon nitride mask for the STI; dry etching the trench opening in the silicon substrate; annealing the silicon substrate at a temperature of at least 1,000xc2x0 C. in an environment that contains oxygen; forming a lining oxide layer in the trench opening; and filling the trench opening with silicon oxide.
The method for forming a shallow trench isolation incorporating a lining oxide layer may further include the step of planarizing the STI after the trench opening filling step, or the step of annealing the silicon substrate and forming the lining oxide layer in the same furnace. The method may further include the step of filling the trench opening with HDP CVD oxide, or the step of annealing the silicon substrate at a temperature of at least 1,000xc2x0 C. in an environment that includes oxygen and nitrogen, or the step of annealing the silicon substrate at a temperature of at least 1,000xc2x0 C. in an environment that includes not more than 10 vol. % oxygen. The method may further include the step of annealing the silicon substrate at a temperature of at least 1,000xc2x0 C. in an environment that includes a sufficient amount of oxygen so as to prevent the formation of silicon nitride.